On Fri, Jan 15, 2021, Xu, Like wrote: > Hi Sean, > > Thanks for your comments ! > > On 2021/1/15 3:10, Sean Christopherson wrote: > > On Mon, Jan 04, 2021, Like Xu wrote: > > > 2) Slow path (part 3, patch 0012-0017) > > > > > > This is when the host assigned physical PMC has a different index > > > from the virtual PMC (e.g. using physical PMC1 to emulate virtual PMC0) > > > In this case, KVM needs to rewrite the PEBS records to change the > > > applicable counter indexes to the virtual PMC indexes, which would > > > otherwise contain the physical counter index written by PEBS facility, > > > and switch the counter reset values to the offset corresponding to > > > the physical counter indexes in the DS data structure. > > > > > > Large PEBS needs to be disabled by KVM rewriting the > > > pebs_interrupt_threshold filed in DS to only one record in > > > the slow path. This is because a guest may implicitly drain PEBS buffer, > > > e.g., context switch. KVM doesn't get a chance to update the PEBS buffer. > > Are the PEBS record write, PEBS index update, and subsequent PMI atomic with > > respect to instruction execution? If not, doesn't this approach still leave a > > window where the guest could see the wrong counter? > > First, KVM would limit/rewrite guest DS pebs_interrupt_threshold to one > record before vm-entry, > (see patch [PATCH v3 14/17] KVM: vmx/pmu: Limit pebs_interrupt_threshold in > the guest DS area) > which means once a PEBS record is written into the guest pebs buffer, > a PEBS PMI will be generated immediately and thus vm-exit. I'm asking about ucode/hardare. Is the "guest pebs buffer write -> PEBS PMI" guaranteed to be atomic? In practice, under what scenarios will guest counters get cross-mapped? And, how does this support affect guest accuracy? I.e. how bad do things get for the guest if we simply disable guest counters if they can't have a 1:1 association with their physical counter?
