Re: [PATCH 6/9] target/mips: Alias MSA vector registers on FPU scalar registers

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On 12/4/20 4:40 PM, Philippe Mathieu-Daudé wrote:
> Back to the patch, instead of aliasing FPU registers to the MSA ones
> (even when MSA is absent), we now alias the MSA ones to the FPU ones
> (only when MSA is present). This is what I call the "inverted logic".
> 
> BTW the point of this change is simply to be able to extract the MSA
> code out of the huge translate.c.

Yes, I see that at the end of the series.  Have a

Reviewed-by: Richard Henderson <richard.henderson@xxxxxxxxxx>

r~



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