Re: [PATCH v2 04/17] perf: x86/ds: Handle guest PEBS overflow PMI and inject it to guest

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On Fri, Nov 27, 2020 at 10:14:49AM +0800, Xu, Like wrote:

> > OK, but the code here wanted to inspect the guest DS from the host. It
> > states this is somehow complicated/expensive. But surely we can at the
> > very least map the first guest DS page somewhere so we can at least
> > access the control bits without too much magic.
> We note that the SDM has a contiguous present memory mapping
> assumption about the DS save area and the PEBS buffer area.
> 
> Therefore, we revisit your suggestion here and move it a bit forward:
> 
> When the PEBS is enabled, KVM will cache the following values:
> - gva ds_area (kvm msr trap)
> - hva1 for "gva ds_area" (walk guest page table)
> - hva2 for "gva pebs_buffer_base" via hva1 (walk guest page table)

What this [gh]va? Guest/Host Virtual Address? I think you're assuming I
know about all this virt crap,.. I don't.

> if the "gva ds_area" cache hits,

what?

> - access PEBS "interrupt threshold" and "Counter Reset[]" via hva1
> - get "gva2 pebs_buffer_base" via __copy_from_user(hva1)

But you already had hva2, so what's the point?

> if the "gva2 pebs_buffer_base" cache hits,

What?

> - we get "gva2 pebs_index" via __copy_from_user(hva2),

pebs_index is in ds_are, which would be hva1

> - rewrite the guest PEBS records via hva2 and pebs_index
> 
> If any cache misses, setup the cache values via walking tables again.
> 
> I wonder if you would agree with this optimization idea,
> we look forward to your confirmation for the next step.

I'm utterly confused. I really can't follow.



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