Hi Nikos,
I tried to apply it on top of master just to make sure everything is correct and I
got a conflict in mmu.c. The line numbers were different, and mmu_clear_user() had
a pud_t *pud local variable, which isn't present in master, but is added by your
series to enable configurable translation granule. Applying on top of that series
worked without any conflicts. Just a heads-up to Drew when it picks them up.
Just to be on the safe side, I ran the tests on a Cortex-A53 and Cortex-A72, with
4k and 64k pages, nothing unexpected. The patch looks good to me.
Thanks,
Alex
On 11/10/20 6:09 PM, Nikos Nikoleris wrote:
> From: Luc Maranget <Luc.Maranget@xxxxxxxx>
>
> Add the mmu_get_pte() function that allows a test to get a pointer to
> the PTE for a valid virtual address. Return NULL if the MMU is off.
>
> Signed-off-by: Nikos Nikoleris <nikos.nikoleris@xxxxxxx>
> Signed-off-by: Luc Maranget <Luc.Maranget@xxxxxxxx>
> Co-Developed-by: Nikos Nikoleris <nikos.nikoleris@xxxxxxx>
> Reviewed-by: Andrew Jones <drjones@xxxxxxxxxx>
> Reviewed-by: Alexandru Elisei <alexandru.elisei@xxxxxxx>
> ---
> lib/arm/asm/mmu-api.h | 1 +
> lib/arm/mmu.c | 32 +++++++++++++++++++++-----------
> 2 files changed, 22 insertions(+), 11 deletions(-)
>
> diff --git a/lib/arm/asm/mmu-api.h b/lib/arm/asm/mmu-api.h
> index 2bbe1fa..3d04d03 100644
> --- a/lib/arm/asm/mmu-api.h
> +++ b/lib/arm/asm/mmu-api.h
> @@ -22,5 +22,6 @@ extern void mmu_set_range_sect(pgd_t *pgtable, uintptr_t virt_offset,
> extern void mmu_set_range_ptes(pgd_t *pgtable, uintptr_t virt_offset,
> phys_addr_t phys_start, phys_addr_t phys_end,
> pgprot_t prot);
> +extern pteval_t *mmu_get_pte(pgd_t *pgtable, uintptr_t vaddr);
> extern void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr);
> #endif
> diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
> index d937f20..a1862a5 100644
> --- a/lib/arm/mmu.c
> +++ b/lib/arm/mmu.c
> @@ -212,7 +212,13 @@ unsigned long __phys_to_virt(phys_addr_t addr)
> return addr;
> }
>
> -void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
> +/*
> + * NOTE: The Arm architecture might require the use of a
> + * break-before-make sequence before making changes to a PTE and
> + * certain conditions are met (see Arm ARM D5-2669 for AArch64 and
> + * B3-1378 for AArch32 for more details).
> + */
> +pteval_t *mmu_get_pte(pgd_t *pgtable, uintptr_t vaddr)
> {
> pgd_t *pgd;
> pud_t *pud;
> @@ -220,7 +226,7 @@ void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
> pte_t *pte;
>
> if (!mmu_enabled())
> - return;
> + return NULL;
>
> pgd = pgd_offset(pgtable, vaddr);
> assert(pgd_valid(*pgd));
> @@ -229,17 +235,21 @@ void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
> pmd = pmd_offset(pud, vaddr);
> assert(pmd_valid(*pmd));
>
> - if (pmd_huge(*pmd)) {
> - pmd_t entry = __pmd(pmd_val(*pmd) & ~PMD_SECT_USER);
> - WRITE_ONCE(*pmd, entry);
> - goto out_flush_tlb;
> - }
> + if (pmd_huge(*pmd))
> + return &pmd_val(*pmd);
>
> pte = pte_offset(pmd, vaddr);
> assert(pte_valid(*pte));
> - pte_t entry = __pte(pte_val(*pte) & ~PTE_USER);
> - WRITE_ONCE(*pte, entry);
>
> -out_flush_tlb:
> - flush_tlb_page(vaddr);
> + return &pte_val(*pte);
> +}
> +
> +void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
> +{
> + pteval_t *p_pte = mmu_get_pte(pgtable, vaddr);
> + if (p_pte) {
> + pteval_t entry = *p_pte & ~PTE_USER;
> + WRITE_ONCE(*p_pte, entry);
> + flush_tlb_page(vaddr);
> + }
> }
