On 2020-11-03 18:29, James Morse wrote:
Hi Marc,
On 02/11/2020 19:16, Marc Zyngier wrote:
Move all the cp15 registers over to their AArch64 counterpart.
This requires the annotation of a few of them (such as the usual
DFAR/IFAR vs FAR_EL1), and a new helper that generates mask/shift
pairs for the various configurations.
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 26c7c25f8a6d..137818793a4a 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -138,26 +156,16 @@ static bool access_vm_reg(struct kvm_vcpu *vcpu,
const struct sys_reg_desc *r)
{
bool was_enabled = vcpu_has_cache_enabled(vcpu);
- u64 val;
- int reg = r->reg;
+ u64 val, mask, shift;
BUG_ON(!p->is_write);
- /* See the 32bit mapping in kvm_host.h */
- if (p->is_aarch32)
- reg = r->reg / 2;
+ get_access_mask(r, &mask, &shift);
- if (!p->is_aarch32 || !p->is_32bit) {
- val = p->regval;
- } else {
- val = vcpu_read_sys_reg(vcpu, reg);
- if (r->reg % 2)
- val = (p->regval << 32) | (u64)lower_32_bits(val);
- else
- val = ((u64)upper_32_bits(val) << 32) |
- lower_32_bits(p->regval);
- }
- vcpu_write_sys_reg(vcpu, val, reg);
+ val = vcpu_read_sys_reg(vcpu, r->reg);
+ val &= ~mask;
+ val |= (p->regval & (mask >> shift)) << shift;
+ vcpu_write_sys_reg(vcpu, val, r->reg);
I can't tell if the compiler has worked out ithat it can skip the
sys_read most of the
time... Won't some of these trap for a nested VHE hypervisor?
| if (~mask) {
| val = vcpu_read_sys_reg(vcpu, r->reg);
| val &= ~mask;
| }
Seems like a good call. I'm happy to fold that in.
But, as the sys_reg arrays already have indirection for this function,
why does
access_vm_reg() have to deal with this at all? Its not even needed for
all the aarch32 registers...
| { AA32(LO), Op1( 0), CRn(10), CRm( 2), Op2( 0),
access_aarch32_alias, NULL, MAIR_EL1 },
Where access_aarch32_alias() does the shift+mask and read_modify-write
on the sys_reg?
I don't really like the idea of separate handlers. The whole point is to
unify the two view, and I feel like having yet another indirection makes
it harder to maintain.
kvm_toggle_cache(vcpu, was_enabled);
return true;
@@ -1919,19 +1919,24 @@ static const struct sys_reg_desc
cp14_64_regs[] = {
*/
static const struct sys_reg_desc cp15_regs[] = {
- { Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, c2_TTBCR
},
+ { Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, TCR_EL1
},
Don't look now ... TTBRCR2 means this one is a LO/HI job.
That's the problem with AArch32. You stop looking for a couple of years,
and it decides to throw a new sysreg at you without any notice. WTF?
(I'm guessing that should be fixed before this series to make the
backport easy)
I'll work something out as a prologue to this series.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
