On Tue, 2020-11-03 at 10:10 -0800, Sean Christopherson wrote: > On Tue, Nov 03, 2020 at 08:39:12AM -0800, James Bottomley wrote: > > On Mon, 2020-09-21 at 18:22 -0700, Sean Christopherson wrote: > > > ASIDs too. I'd also love to see more info in the docs and/or > > > cover letter to explain why ASID management on SEV requires a > > > cgroup. I know what an ASID is, and have a decent idea of how > > > KVM manages ASIDs for legacy VMs, but I know nothing about why > > > ASIDs are limited for SEV and not legacy VMs. > > > > Well, also, why would we only have a cgroup for ASIDs but not > > MSIDs? > > Assuming MSID==PCID in Intel terminology, which may be a bad > assumption, the answer is that rationing PCIDs is a fools errand, at > least on Intel CPUs. Yes, sorry, I should probably have confessed that I'm most used to parisc SIDs, which are additional 32 bit qualifiers the CPU explicitly adds to every virtual address. The perform exactly the same function, though except they're a bit more explicit (and we have more bits). On PA every virtual address is actually a GVA consisting of 32 bit of SID and 64 bits of VA and we use this 96 byte address for virtual indexing and things. And parisc doesn't have virtualization acceleration so we only have one type of SID. Thanks for the rest of the elaboration. James
