Hi Marc,
On 02/11/2020 19:16, Marc Zyngier wrote:
> The use of the AArch32-specific accessors have always been a bit
> annoying on 64bit, and it is time for a change.
>
> Let's move the AArch32 exception injection over to the AArch64 encoding,
> which requires us to split the two halves of FAR_EL1 into DFAR and IFAR.
> This enables us to drop the preempt_disable() games on VHE, and to kill
> the last user of the vcpu_cp15() macro.
Hurrah!
> diff --git a/arch/arm64/kvm/inject_fault.c b/arch/arm64/kvm/inject_fault.c
> index e2a2e48ca371..975f65ba6a8b 100644
> --- a/arch/arm64/kvm/inject_fault.c
> +++ b/arch/arm64/kvm/inject_fault.c
> @@ -100,39 +81,36 @@ static void inject_undef32(struct kvm_vcpu *vcpu)
> * Modelled after TakeDataAbortException() and TakePrefetchAbortException
> * pseudocode.
> */
> -static void inject_abt32(struct kvm_vcpu *vcpu, bool is_pabt,
> - unsigned long addr)
> +static void inject_abt32(struct kvm_vcpu *vcpu, bool is_pabt, u32 addr)
> {
> - u32 *far, *fsr;
> - bool is_lpae;
> - bool loaded;
> + u64 far;
> + u32 fsr;
> + /* Give the guest an IMPLEMENTATION DEFINED exception */
> + if (__vcpu_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE) {
With VHE, won't __vcpu_sys_reg() read the potentially stale copy in the sys_reg array?
vcpu_read_sys_reg()?
> + fsr = DFSR_LPAE | DFSR_FSC_EXTABT_LPAE;
> + } else {
> + /* no need to shuffle FS[4] into DFSR[10] as its 0 */
> + fsr = DFSR_FSC_EXTABT_nLPAE;
> + }
>
> - loaded = pre_fault_synchronize(vcpu);
> + far = vcpu_read_sys_reg(vcpu, FAR_EL1);
Thanks,
James
