RISC-V UER for trapless doorbell register writes

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Hi,
Thanks for the "HA-IOV: Applying Hardware-assisted Techniques to IO
Virtualization Framework" KVM Forum presentation about RISC-V UER for
trapless doorbell register writes.

I'm trying to understand the motivation for HA-IOV. Is the key point
that UER is faster than IPI at waking up a target thread that is
currently descheduled?

If not, then I missed something and maybe you could explain the
advantages of using UER?

Thanks,
Stefan

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