Re: [PATCH 01/11] KVM: arm64: Don't adjust PC on SError during SMC trap

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On 2020-10-26 13:53, Mark Rutland wrote:
On Mon, Oct 26, 2020 at 01:34:40PM +0000, Marc Zyngier wrote:
On SMC trap, the prefered return address is set to that of the SMC
instruction itself. It is thus wrong to tyr and roll it back when

Typo: s/tyr/try/

an SError occurs while trapping on SMC. It is still necessary on
HVC though, as HVC doesn't cause a trap, and sets ELR to returning
*after* the HVC.

It also became apparent that the is 16bit encoding for an AArch32

I guess s/that the is/that there is no/ ?

Something along these lines, yes! ;-)


HVC instruction, meaning that the displacement is always 4 bytes,
no matter what the ISA is. Take this opportunity to simplify it.

Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>

Assuming that there is no 16-bit HVC:

It is actually impossible to have a 16bit encoding for HVC, as
it always convey a 16bit immediate, and you need some space
to encode the instruction itself!


Acked-by: Mark Rutland <mark.rutland@xxxxxxx>

Thanks,

        M.
--
Jazz is not dead. It just smells funny...



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