On Thu, 2020-09-17 at 09:14 -0700, Sean Christopherson wrote: > On Thu, Sep 17, 2020 at 02:07:23PM +0300, Maxim Levitsky wrote: > > + * Intel PRM states that MSR_IA32_TSC read adds the TSC offset > > One more nit, "Intel SDM" would be preferred as that's most commonly used in > KVM changelogs, and there are multiple PRM acronyms in Intel's dictionary > these days. Fixed. Best regards, Maxim Levitsky > > > + * even when not intercepted. AMD manual doesn't define this > > + * but appears to behave the same > > + * > > + * However when userspace wants to read this MSR, return its > > + * real L1 value so that its restore will be correct > > + * > > + */ > > + if (msr_info->host_initiated) > > + msr_info->data = kvm_read_l1_tsc(vcpu, rdtsc()); > > + else > > + msr_info->data = kvm_read_l2_tsc(vcpu, rdtsc()); > > break; > > case MSR_MTRRcap: > > case 0x200 ... 0x2ff: > > -- > > 2.26.2 > >
