On Mon, Sep 14, 2020 at 8:13 PM Jim Mattson <jmattson@xxxxxxxxxx> wrote: > > On Mon, Sep 14, 2020 at 5:18 PM Jim Mattson <jmattson@xxxxxxxxxx> wrote: > > > > On Fri, Sep 11, 2020 at 8:36 AM Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote: > > > > > > On 31/08/20 23:55, Jim Mattson wrote: > > > > Moreover, older AMD hardware never sets bits 32 or 33 at all. > > > > > > Interesting, I didn't know this. Is it documented at all? > > > > You'll have to find an old version of the APM. For example, see page > > 56 of http://www.0x04.net/doc/amd/33047.pdf (this was back when SVM > > was a separate document). > > Ah ha. It looks like bits 32 and 33 weren't there in version 3.14 of > the APM volume 2 in September 2007. (See > http://application-notes.digchip.com/019/19-44680.pdf, pages 410-411.) > They had appeared by version 3.17 in June 2010. Maybe someone from AMD > can enlighten us. My memory's just not that good. In fact, if I recall correctly, this is why AMD has *two* bits where it would seem that one bit should suffice; they actually have three states: 00: No information provided 01: Final translation 10: Page table walk
