On 31/08/20 23:55, Jim Mattson wrote: > On Fri, Aug 28, 2020 at 5:57 PM Krish Sadhukhan > <krish.sadhukhan@xxxxxxxxxx> wrote: >> >> If the P (present) bit in an NPT entry is cleared, VMRUN will fail and the >> guest will exit to the host with an exit code of 0x400 (#NPF). The following >> bits of importance in EXITINFO1 will be set/cleared to indicate the failure: >> >> bit# 0: cleared >> bit# 32: set > > This seems like a terrible commit description. First, the P bit can be > cleared in a plethora of NPT entries without having any effect on > guest execution. It's only if the guest tries to access a GPA whose > translation uses the non-present NPT entry that there is an issue. > Second, the VMRUN does not fail. If the VM-exit code is anything other > than -1, the VMRUN has succeeded. Third, the bits in EXITINFO that get > set/cleared depend very much on the actual access. Yes, if the nested > page walk terminates due to a non-present page, bit 0 will be cleared. > However, bit 32 will only be set if the non-present page was > encountered while translating the final guest physical address (not > the guest physical address of a page table page encountered during the > walk). Moreover, older AMD hardware never sets bits 32 or 33 at all. > Bit 1 will be set if the access was a write (or a page table walk). > Bit 2 will be set for a user access. Bit 4 will be set for a code read > (while translating the final guest physical address). > Queued, with an adjusted commit message. I am currently on leave so I am going through the patches and queuing them, but I will only push kvm/next and kvm/queue next week. kvm/master patches will be sent to Linus for the next -rc though. Thanks, Paolo
