On 10/09/20 09:01, Philippe Mathieu-Daudé wrote: > In order to use inclusive terminology, rename max_slaves > as max_devices. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx> I think we should consider a wholesale replacement of SSISlave with SSIPeripheral according to the proposal at https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/. Paolo > --- > include/hw/ssi/aspeed_smc.h | 2 +- > hw/ssi/aspeed_smc.c | 40 ++++++++++++++++++------------------- > 2 files changed, 21 insertions(+), 21 deletions(-) > > diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h > index 6fbbb238f15..52ae34e38d1 100644 > --- a/include/hw/ssi/aspeed_smc.h > +++ b/include/hw/ssi/aspeed_smc.h > @@ -42,7 +42,7 @@ typedef struct AspeedSMCController { > uint8_t r_timings; > uint8_t nregs_timings; > uint8_t conf_enable_w0; > - uint8_t max_slaves; > + uint8_t max_devices; > const AspeedSegments *segments; > hwaddr flash_window_base; > uint32_t flash_window_size; > diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c > index 795784e5f36..8219272016c 100644 > --- a/hw/ssi/aspeed_smc.c > +++ b/hw/ssi/aspeed_smc.c > @@ -259,7 +259,7 @@ static const AspeedSMCController controllers[] = { > .r_timings = R_TIMINGS, > .nregs_timings = 1, > .conf_enable_w0 = CONF_ENABLE_W0, > - .max_slaves = 1, > + .max_devices = 1, > .segments = aspeed_segments_legacy, > .flash_window_base = ASPEED_SOC_SMC_FLASH_BASE, > .flash_window_size = 0x6000000, > @@ -275,7 +275,7 @@ static const AspeedSMCController controllers[] = { > .r_timings = R_TIMINGS, > .nregs_timings = 1, > .conf_enable_w0 = CONF_ENABLE_W0, > - .max_slaves = 5, > + .max_devices = 5, > .segments = aspeed_segments_fmc, > .flash_window_base = ASPEED_SOC_FMC_FLASH_BASE, > .flash_window_size = 0x10000000, > @@ -293,7 +293,7 @@ static const AspeedSMCController controllers[] = { > .r_timings = R_SPI_TIMINGS, > .nregs_timings = 1, > .conf_enable_w0 = SPI_CONF_ENABLE_W0, > - .max_slaves = 1, > + .max_devices = 1, > .segments = aspeed_segments_spi, > .flash_window_base = ASPEED_SOC_SPI_FLASH_BASE, > .flash_window_size = 0x10000000, > @@ -309,7 +309,7 @@ static const AspeedSMCController controllers[] = { > .r_timings = R_TIMINGS, > .nregs_timings = 1, > .conf_enable_w0 = CONF_ENABLE_W0, > - .max_slaves = 3, > + .max_devices = 3, > .segments = aspeed_segments_ast2500_fmc, > .flash_window_base = ASPEED_SOC_FMC_FLASH_BASE, > .flash_window_size = 0x10000000, > @@ -327,7 +327,7 @@ static const AspeedSMCController controllers[] = { > .r_timings = R_TIMINGS, > .nregs_timings = 1, > .conf_enable_w0 = CONF_ENABLE_W0, > - .max_slaves = 2, > + .max_devices = 2, > .segments = aspeed_segments_ast2500_spi1, > .flash_window_base = ASPEED_SOC_SPI_FLASH_BASE, > .flash_window_size = 0x8000000, > @@ -343,7 +343,7 @@ static const AspeedSMCController controllers[] = { > .r_timings = R_TIMINGS, > .nregs_timings = 1, > .conf_enable_w0 = CONF_ENABLE_W0, > - .max_slaves = 2, > + .max_devices = 2, > .segments = aspeed_segments_ast2500_spi2, > .flash_window_base = ASPEED_SOC_SPI2_FLASH_BASE, > .flash_window_size = 0x8000000, > @@ -359,7 +359,7 @@ static const AspeedSMCController controllers[] = { > .r_timings = R_TIMINGS, > .nregs_timings = 1, > .conf_enable_w0 = CONF_ENABLE_W0, > - .max_slaves = 3, > + .max_devices = 3, > .segments = aspeed_segments_ast2600_fmc, > .flash_window_base = ASPEED26_SOC_FMC_FLASH_BASE, > .flash_window_size = 0x10000000, > @@ -377,7 +377,7 @@ static const AspeedSMCController controllers[] = { > .r_timings = R_TIMINGS, > .nregs_timings = 2, > .conf_enable_w0 = CONF_ENABLE_W0, > - .max_slaves = 2, > + .max_devices = 2, > .segments = aspeed_segments_ast2600_spi1, > .flash_window_base = ASPEED26_SOC_SPI_FLASH_BASE, > .flash_window_size = 0x10000000, > @@ -395,7 +395,7 @@ static const AspeedSMCController controllers[] = { > .r_timings = R_TIMINGS, > .nregs_timings = 3, > .conf_enable_w0 = CONF_ENABLE_W0, > - .max_slaves = 3, > + .max_devices = 3, > .segments = aspeed_segments_ast2600_spi2, > .flash_window_base = ASPEED26_SOC_SPI2_FLASH_BASE, > .flash_window_size = 0x10000000, > @@ -476,7 +476,7 @@ static bool aspeed_smc_flash_overlap(const AspeedSMCState *s, > AspeedSegments seg; > int i; > > - for (i = 0; i < s->ctrl->max_slaves; i++) { > + for (i = 0; i < s->ctrl->max_devices; i++) { > if (i == cs) { > continue; > } > @@ -537,7 +537,7 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs, > */ > if ((s->ctrl->segments == aspeed_segments_ast2500_spi1 || > s->ctrl->segments == aspeed_segments_ast2500_spi2) && > - cs == s->ctrl->max_slaves && > + cs == s->ctrl->max_devices && > seg.addr + seg.size != s->ctrl->segments[cs].addr + > s->ctrl->segments[cs].size) { > qemu_log_mask(LOG_GUEST_ERROR, > @@ -948,7 +948,7 @@ static void aspeed_smc_reset(DeviceState *d) > } > > /* setup the default segment register values and regions for all */ > - for (i = 0; i < s->ctrl->max_slaves; ++i) { > + for (i = 0; i < s->ctrl->max_devices; ++i) { > aspeed_smc_flash_set_segment_region(s, i, > s->ctrl->segment_to_reg(s, &s->ctrl->segments[i])); > } > @@ -995,8 +995,8 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size) > (s->ctrl->has_dma && addr == R_DMA_DRAM_ADDR) || > (s->ctrl->has_dma && addr == R_DMA_LEN) || > (s->ctrl->has_dma && addr == R_DMA_CHECKSUM) || > - (addr >= R_SEG_ADDR0 && addr < R_SEG_ADDR0 + s->ctrl->max_slaves) || > - (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->ctrl->max_slaves)) { > + (addr >= R_SEG_ADDR0 && addr < R_SEG_ADDR0 + s->ctrl->max_devices) || > + (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->ctrl->max_devices)) { > > trace_aspeed_smc_read(addr, size, s->regs[addr]); > > @@ -1270,7 +1270,7 @@ static void aspeed_smc_write(void *opaque, hwaddr addr, uint64_t data, > int cs = addr - s->r_ctrl0; > aspeed_smc_flash_update_ctrl(&s->flashes[cs], value); > } else if (addr >= R_SEG_ADDR0 && > - addr < R_SEG_ADDR0 + s->ctrl->max_slaves) { > + addr < R_SEG_ADDR0 + s->ctrl->max_devices) { > int cs = addr - R_SEG_ADDR0; > > if (value != s->regs[R_SEG_ADDR0 + cs]) { > @@ -1341,10 +1341,10 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp) > s->conf_enable_w0 = s->ctrl->conf_enable_w0; > > /* Enforce some real HW limits */ > - if (s->num_cs > s->ctrl->max_slaves) { > + if (s->num_cs > s->ctrl->max_devices) { > qemu_log_mask(LOG_GUEST_ERROR, "%s: num_cs cannot exceed: %d\n", > - __func__, s->ctrl->max_slaves); > - s->num_cs = s->ctrl->max_slaves; > + __func__, s->ctrl->max_devices); > + s->num_cs = s->ctrl->max_devices; > } > > /* DMA irq. Keep it first for the initialization in the SoC */ > @@ -1376,7 +1376,7 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp) > s->ctrl->flash_window_size); > sysbus_init_mmio(sbd, &s->mmio_flash); > > - s->flashes = g_new0(AspeedSMCFlash, s->ctrl->max_slaves); > + s->flashes = g_new0(AspeedSMCFlash, s->ctrl->max_devices); > > /* > * Let's create a sub memory region for each possible slave. All > @@ -1385,7 +1385,7 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp) > * module behind to handle the memory accesses. This depends on > * the board configuration. > */ > - for (i = 0; i < s->ctrl->max_slaves; ++i) { > + for (i = 0; i < s->ctrl->max_devices; ++i) { > AspeedSMCFlash *fl = &s->flashes[i]; > > snprintf(name, sizeof(name), "%s.%d", s->ctrl->name, i); >
