Some hardware implementations may enforce cache coherency across encryption domains. In such cases, it's not required to flush SEV-encrypted pages off cache lines. Signed-off-by: Krish Sadhukhan <krish.sadhukhan@xxxxxxxxxx> --- arch/x86/kvm/svm/sev.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 402dc4234e39..c8ed8a62d5ef 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -384,7 +384,8 @@ static void sev_clflush_pages(struct page *pages[], unsigned long npages) uint8_t *page_virtual; unsigned long i; - if (npages == 0 || pages == NULL) + if ((cpuid_eax(SVM_SME_CPUID_FUNC) & (1u << 10)) || npages == 0 || + pages == NULL) return; for (i = 0; i < npages; i++) { -- 2.18.4