Expose the SERIALIZE and TSX Suspend Load Address Tracking features in KVM CPUID, so when running on processors which support them, KVM could pass this information to guests and they can make use of these features accordingly. SERIALIZE is a faster serializing instruction which does not modify registers, arithmetic flags or memory, will not cause VM exit. It's availability is indicated by CPUID.(EAX=7,ECX=0):ECX[bit 14]. TSX suspend load tracking instruction aims to give a way to choose which memory accesses do not need to be tracked in the TSX read set. It's availability is indicated as CPUID.(EAX=7,ECX=0):EDX[bit 16]. Those instructions are currently documented in the the latest "extensions" manual (ISE). It will appear in the "main" manual (SDM) in the future. Signed-off-by: Cathy Zhang <cathy.zhang@xxxxxxxxx> Reviewed-by: Tony Luck <tony.luck@xxxxxxxxx> --- Changes since v2: * Merge two patches into a single one. (Luck, Tony) * Add overview introduction for features. (Sean Christopherson) * Refactor commit message to explain why expose feature bits. (Luck, Tony) --- arch/x86/kvm/cpuid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 8a294f9..dcf48cc 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -341,7 +341,8 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_mask(CPUID_7_EDX, F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | - F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) + F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) | + F(SERIALIZE) | F(TSXLDTRK) ); /* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */ -- 1.8.3.1
