Hi,
Not familiar with kvm. And I have a question about this patch. Maybe
backport this patch 3204be4109ad("KVM: arm64: Make vcpu_cp1x() work on
Big Endian hosts") without 52f6c4f02164 ("KVM: arm64: Change 32-bit
handling of VM system registers") seems not right?
Thanks,
Kun.
在 2020/6/16 18:56, gregkh@xxxxxxxxxxxxxxxxxxx 写道:
This is a note to let you know that I've just added the patch titled
KVM: arm64: Make vcpu_cp1x() work on Big Endian hosts
to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
kvm-arm64-make-vcpu_cp1x-work-on-big-endian-hosts.patch
and it can be found in the queue-4.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
From 3204be4109ad681523e3461ce64454c79278450a Mon Sep 17 00:00:00 2001
From: Marc Zyngier <maz@xxxxxxxxxx>
Date: Tue, 9 Jun 2020 08:40:35 +0100
Subject: KVM: arm64: Make vcpu_cp1x() work on Big Endian hosts
From: Marc Zyngier <maz@xxxxxxxxxx>
commit 3204be4109ad681523e3461ce64454c79278450a upstream.
AArch32 CP1x registers are overlayed on their AArch64 counterparts
in the vcpu struct. This leads to an interesting problem as they
are stored in their CPU-local format, and thus a CP1x register
doesn't "hit" the lower 32bit portion of the AArch64 register on
a BE host.
To workaround this unfortunate situation, introduce a bias trick
in the vcpu_cp1x() accessors which picks the correct half of the
64bit register.
Cc: stable@xxxxxxxxxxxxxxx
Reported-by: James Morse <james.morse@xxxxxxx>
Tested-by: James Morse <james.morse@xxxxxxx>
Acked-by: James Morse <james.morse@xxxxxxx>
Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/arm64/include/asm/kvm_host.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -178,8 +178,10 @@ struct kvm_vcpu_arch {
* CP14 and CP15 live in the same array, as they are backed by the
* same system registers.
*/
-#define vcpu_cp14(v,r) ((v)->arch.ctxt.copro[(r)])
-#define vcpu_cp15(v,r) ((v)->arch.ctxt.copro[(r)])
+#define CPx_BIAS IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)
+
+#define vcpu_cp14(v,r) ((v)->arch.ctxt.copro[(r) ^ CPx_BIAS])
+#define vcpu_cp15(v,r) ((v)->arch.ctxt.copro[(r) ^ CPx_BIAS])
#ifdef CONFIG_CPU_BIG_ENDIAN
#define vcpu_cp15_64_high(v,r) vcpu_cp15((v),(r))
Patches currently in stable-queue which might be from maz@xxxxxxxxxx are
queue-4.4/kvm-arm64-make-vcpu_cp1x-work-on-big-endian-hosts.patch
.
