On Tue, Jul 28, 2020 at 4:37 PM Babu Moger <babu.moger@xxxxxxx> wrote: > > The following series adds the support for PCID/INVPCID on AMD guests. > While doing it re-structured the vmcb_control_area data structure to > combine all the intercept vectors into one 32 bit array. Makes it easy > for future additions. > > INVPCID interceptions are added only when the guest is running with > shadow page table enabled. In this case the hypervisor needs to handle > the tlbflush based on the type of invpcid instruction. > > For the guests with nested page table (NPT) support, the INVPCID feature > works as running it natively. KVM does not need to do any special handling. > > AMD documentation for INVPCID feature is available at "AMD64 Architecture > Programmer’s Manual Volume 2: System Programming, Pub. 24593 Rev. 3.34(or later)" > > The documentation can be obtained at the links below: > Link: https://www.amd.com/system/files/TechDocs/24593.pdf > Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Very nice cleanup. Thanks for doing this!
