> On Jul 15, 2020, at 1:52 PM, Sean Christopherson <sean.j.christopherson@xxxxxxxxx> wrote:
>
> Explicitly zero cr4 in prepare_64() instead of "zeroing" it in the
> common enter_long_mode(). Clobbering cr4 in enter_long_mode() breaks
> switch_to_5level(), which sets cr4.LA57 before calling enter_long_mode()
> and obviously expects cr4 to be preserved.
>
> Fixes: d86ef58 ("cstart: do not assume CR4 starts as zero")
> Cc: Nadav Amit <namit@xxxxxxxxxx>
> Cc: Paolo Bonzini <pbonzini@xxxxxxxxxx>
> Signed-off-by: Sean Christopherson <sean.j.christopherson@xxxxxxxxx>
> ---
>
> Two lines of code, two bugs. I'm pretty sure Paolo should win some kind
> of award. :-D
I guess it is my fault for stressing him to push the changes so I can run it
on the AMD machine that was lended to me.
Reviewed-by: Nadav Amit <namit@xxxxxxxxxx>
