Paolo Bonzini <pbonzini@xxxxxxxxxx> writes:
> On 18/06/20 14:54, Vitaly Kuznetsov wrote:
>> Paolo Bonzini <pbonzini@xxxxxxxxxx> writes:
>>
>>> On 18/06/20 13:13, Vitaly Kuznetsov wrote:
>>>> state_test/smm_test selftests are failing on AMD with:
>>>> "Unexpected result from KVM_GET_MSRS, r: 51 (failed MSR was 0x345)"
>>>>
>>>> MSR_IA32_PERF_CAPABILITIES is an emulated MSR on Intel but it is not
>>>> known to AMD code, emulate it there too (by returning 0 and allowing
>>>> userspace to write 0). This way the code is better prepared to the
>>>> eventual appearance of the feature in AMD hardware.
>>>>
>>>> Fixes: 27461da31089 ("KVM: x86/pmu: Support full width counting")
>>>> Suggested-by: Jim Mattson <jmattson@xxxxxxxxxx>
>>>> Suggested-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
>>>> Signed-off-by: Vitaly Kuznetsov <vkuznets@xxxxxxxxxx>
>>>> ---
>>>> arch/x86/kvm/svm/pmu.c | 29 ++++++++++++++++++++++++++++-
>>>> 1 file changed, 28 insertions(+), 1 deletion(-)
>>> This is okay and I'll apply it, but it would be even better to move the
>>> whole handling of the MSR to common x86 code.
>> I thought about that but intel_pmu_set_msr() looks at
>> vmx_get_perf_capabilities(), we'll need to abstract this somehow.
>
> Indeed, you could use kvm_get_msr_feature for that.
>
Turns out I completely forgot about this patch and just stumbled about
the same issue again. The suggestion to move this to common x86 code
makes perfect sense, I'll be sending v3 shortly.
Thanks!
--
Vitaly
