On 10/07/20 09:23, Huacai Chen wrote:
> Commit dc6d95b153e78ed70b1b2c04a ("KVM: MIPS: Add more MMIO load/store
> instructions emulation") introduced some 64bit load/store instructions
> emulation which are unavailable on 32bit platform, and it causes build
> errors:
>
> arch/mips/kvm/emulate.c: In function 'kvm_mips_emulate_store':
> arch/mips/kvm/emulate.c:1734:6: error: right shift count >= width of type [-Werror]
> ((vcpu->arch.gprs[rt] >> 56) & 0xff);
> ^
> arch/mips/kvm/emulate.c:1738:6: error: right shift count >= width of type [-Werror]
> ((vcpu->arch.gprs[rt] >> 48) & 0xffff);
> ^
> arch/mips/kvm/emulate.c:1742:6: error: right shift count >= width of type [-Werror]
> ((vcpu->arch.gprs[rt] >> 40) & 0xffffff);
> ^
> arch/mips/kvm/emulate.c:1746:6: error: right shift count >= width of type [-Werror]
> ((vcpu->arch.gprs[rt] >> 32) & 0xffffffff);
> ^
> arch/mips/kvm/emulate.c:1796:6: error: left shift count >= width of type [-Werror]
> (vcpu->arch.gprs[rt] << 32);
> ^
> arch/mips/kvm/emulate.c:1800:6: error: left shift count >= width of type [-Werror]
> (vcpu->arch.gprs[rt] << 40);
> ^
> arch/mips/kvm/emulate.c:1804:6: error: left shift count >= width of type [-Werror]
> (vcpu->arch.gprs[rt] << 48);
> ^
> arch/mips/kvm/emulate.c:1808:6: error: left shift count >= width of type [-Werror]
> (vcpu->arch.gprs[rt] << 56);
> ^
> cc1: all warnings being treated as errors
> make[3]: *** [arch/mips/kvm/emulate.o] Error 1
>
> So, use #if defined(CONFIG_64BIT) && defined(CONFIG_KVM_MIPS_VZ) to
> guard the 64bit load/store instructions emulation.
>
> Reported-by: kernel test robot <lkp@xxxxxxxxx>
> Fixes: dc6d95b153e78ed70b1b2c04a ("KVM: MIPS: Add more MMIO load/store instructions emulation")
> Signed-off-by: Huacai Chen <chenhc@xxxxxxxxxx>
> ---
> arch/mips/kvm/emulate.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c
> index 5ae82d9..d242300c 100644
> --- a/arch/mips/kvm/emulate.c
> +++ b/arch/mips/kvm/emulate.c
> @@ -1722,6 +1722,7 @@ enum emulation_result kvm_mips_emulate_store(union mips_instruction inst,
> vcpu->arch.gprs[rt], *(u32 *)data);
> break;
>
> +#if defined(CONFIG_64BIT) && defined(CONFIG_KVM_MIPS_VZ)
> case sdl_op:
> run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa(
> vcpu->arch.host_cp0_badvaddr) & (~0x7);
> @@ -1815,6 +1816,7 @@ enum emulation_result kvm_mips_emulate_store(union mips_instruction inst,
> vcpu->arch.pc, vcpu->arch.host_cp0_badvaddr,
> vcpu->arch.gprs[rt], *(u64 *)data);
> break;
> +#endif
>
> #ifdef CONFIG_CPU_LOONGSON64
> case sdc2_op:
> @@ -2002,6 +2004,7 @@ enum emulation_result kvm_mips_emulate_load(union mips_instruction inst,
> }
> break;
>
> +#if defined(CONFIG_64BIT) && defined(CONFIG_KVM_MIPS_VZ)
> case ldl_op:
> run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa(
> vcpu->arch.host_cp0_badvaddr) & (~0x7);
> @@ -2073,6 +2076,7 @@ enum emulation_result kvm_mips_emulate_load(union mips_instruction inst,
> break;
> }
> break;
> +#endif
>
> #ifdef CONFIG_CPU_LOONGSON64
> case ldc2_op:
>
Queued, thanks.
Paolo
