Ping friendly.
If there is room for improvement, please let me know.
On 2020/6/23 21:13, Like Xu wrote:
On 2020/6/13 16:09, Like Xu wrote:
Hi all,
Please help review this new version for the Kenrel 5.9 release.
Now, you may apply the last two qemu-devel patches to the upstream
qemu and try the guest LBR feature with '-cpu host' command line.
v11->v12 Changelog:
- apply "Signed-off-by" form PeterZ and his codes for the perf subsystem;
- add validity checks before expose LBR via MSR_IA32_PERF_CAPABILITIES;
- refactor MSR_IA32_DEBUGCTLMSR emulation with validity check;
- reorder "perf_event_attr" fields according to how they're declared;
- replace event_is_oncpu() with "event->state" check;
- make LBR emualtion specific to vmx rather than x86 generic;
- move pass-through LBR code to vmx.c instead of pmu_intel.c;
- add vmx_lbr_en/disable_passthrough layer to make code readable;
- rewrite pmu availability check with vmx_passthrough_lbr_msrs();
You may check more details in each commit.
Previous:
https://lore.kernel.org/kvm/20200514083054.62538-1-like.xu@xxxxxxxxxxxxxxx/
---
...
Wei Wang (1):
perf/x86: Fix variable types for LBR registers > Like Xu (10):
perf/x86/core: Refactor hw->idx checks and cleanup
perf/x86/lbr: Add interface to get LBR information
perf/x86: Add constraint to create guest LBR event without hw counter
perf/x86: Keep LBR records unchanged in host context for guest usage
Hi Peter,
Would you like to add "Acked-by" to the first three perf patches ?
KVM: vmx/pmu: Expose LBR to guest via MSR_IA32_PERF_CAPABILITIES
KVM: vmx/pmu: Unmask LBR fields in the MSR_IA32_DEBUGCTLMSR emualtion
KVM: vmx/pmu: Pass-through LBR msrs when guest LBR event is scheduled
KVM: vmx/pmu: Emulate legacy freezing LBRs on virtual PMI
KVM: vmx/pmu: Reduce the overhead of LBR pass-through or cancellation
KVM: vmx/pmu: Release guest LBR event via lazy release mechanism
Hi Paolo,
Would you like to take a moment to review the KVM part for this feature ?
Thanks,
Like Xu
Qemu-devel:
target/i386: add -cpu,lbr=true support to enable guest LBR
arch/x86/events/core.c | 26 +--
arch/x86/events/intel/core.c | 109 ++++++++-----
arch/x86/events/intel/lbr.c | 51 +++++-
arch/x86/events/perf_event.h | 8 +-
arch/x86/include/asm/perf_event.h | 34 +++-
arch/x86/kvm/pmu.c | 12 +-
arch/x86/kvm/pmu.h | 5 +
arch/x86/kvm/vmx/capabilities.h | 23 ++-
arch/x86/kvm/vmx/pmu_intel.c | 253 +++++++++++++++++++++++++++++-
arch/x86/kvm/vmx/vmx.c | 86 +++++++++-
arch/x86/kvm/vmx/vmx.h | 17 ++
arch/x86/kvm/x86.c | 13 --
12 files changed, 559 insertions(+), 78 deletions(-)
