On 22/06/20 19:42, Sean Christopherson wrote: > Ping. These still apply cleanly on master and are required to get unit > tests passing on systems with 5-level paging. > > On Fri, Feb 07, 2020 at 09:42:40AM -0800, Sean Christopherson wrote: >> Add support for 5-level nested EPT and clean up the test for >> MSR_IA32_VMX_EPT_VPID_CAP in the process. >> >> Sean Christopherson (4): >> nVMX: Extend EPTP test to allow 5-level EPT >> nVMX: Refactor the EPT/VPID MSR cap check to make it readable >> nVMX: Mark bit 39 of MSR_IA32_VMX_EPT_VPID_CAP as reserved >> nVMX: Extend EPT cap MSR test to allow 5-level EPT >> >> x86/vmx.c | 21 ++++++++++++++++++++- >> x86/vmx.h | 4 +++- >> x86/vmx_tests.c | 12 ++++++++---- >> 3 files changed, 31 insertions(+), 6 deletions(-) >> >> -- >> 2.24.1 >> > Applied, thanks. Paolo
