On 08/06/20 20:16, Sean Christopherson wrote:
> On Thu, May 28, 2020 at 01:55:44PM +0200, Paolo Bonzini wrote:
>> On 28/05/20 04:15, Sean Christopherson wrote:
>>> Explicitly set the VA width to 48 bits for the x86_64-only PXXV48_4K VM
>>> mode instead of asserting the guest VA width is 48 bits. The fact that
>>> KVM supports 5-level paging is irrelevant unless the selftests opt-in to
>>> 5-level paging by setting CR4.LA57 for the guest. The overzealous
>>> assert prevents running the selftests on a kernel with 5-level paging
>>> enabled.
>>>
>>> Incorporate LA57 into the assert instead of removing the assert entirely
>>> as a sanity check of KVM's CPUID output.
>>>
>>> Fixes: 567a9f1e9deb ("KVM: selftests: Introduce VM_MODE_PXXV48_4K")
>>> Reported-by: Sergio Perez Gonzalez <sergio.perez.gonzalez@xxxxxxxxx>
>>> Cc: Adriana Cervantes Jimenez <adriana.cervantes.jimenez@xxxxxxxxx>
>>> Cc: Peter Xu <peterx@xxxxxxxxxx>
>>> Signed-off-by: Sean Christopherson <sean.j.christopherson@xxxxxxxxx>
>>> ---
>>> tools/testing/selftests/kvm/lib/kvm_util.c | 11 +++++++++--
>>> 1 file changed, 9 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/tools/testing/selftests/kvm/lib/kvm_util.c b/tools/testing/selftests/kvm/lib/kvm_util.c
>>> index c9cede5c7d0de..74776ee228f2d 100644
>>> --- a/tools/testing/selftests/kvm/lib/kvm_util.c
>>> +++ b/tools/testing/selftests/kvm/lib/kvm_util.c
>>> @@ -195,11 +195,18 @@ struct kvm_vm *_vm_create(enum vm_guest_mode mode, uint64_t phy_pages, int perm)
>>> case VM_MODE_PXXV48_4K:
>>> #ifdef __x86_64__
>>> kvm_get_cpu_address_width(&vm->pa_bits, &vm->va_bits);
>>> - TEST_ASSERT(vm->va_bits == 48, "Linear address width "
>>> - "(%d bits) not supported", vm->va_bits);
>>> + /*
>>> + * Ignore KVM support for 5-level paging (vm->va_bits == 57),
>>> + * it doesn't take effect unless a CR4.LA57 is set, which it
>>> + * isn't for this VM_MODE.
>>> + */
>>> + TEST_ASSERT(vm->va_bits == 48 || vm->va_bits == 57,
>>> + "Linear address width (%d bits) not supported",
>>> + vm->va_bits);
>>> pr_debug("Guest physical address width detected: %d\n",
>>> vm->pa_bits);
>>> vm->pgtable_levels = 4;
>>> + vm->va_bits = 48;
>>> #else
>>> TEST_FAIL("VM_MODE_PXXV48_4K not supported on non-x86 platforms");
>>> #endif
>>>
>>
>> Queued, thnaks.
>>
>> Paolo
>
> Looks like this one also got lost in the 5.7 -> 5.8 transition.
>
Indeed, added back to the queue now.
Paolo
