On Wed, May 06, 2020 at 04:21:09PM +0800, Yang Weijiang wrote: > Set the feature bits so that CET capabilities can be seen in guest via > CPUID enumeration. Add CR4.CET bit support in order to allow guest set CET > master control bit(CR4.CET). > > Signed-off-by: Yang Weijiang <weijiang.yang@xxxxxxxxx> > --- > arch/x86/include/asm/kvm_host.h | 3 ++- > arch/x86/kvm/cpuid.c | 5 +++-- > 2 files changed, 5 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > index f68c825e94ad..21f3c89d8c70 100644 > --- a/arch/x86/include/asm/kvm_host.h > +++ b/arch/x86/include/asm/kvm_host.h > @@ -95,7 +95,8 @@ > | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ > | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ > | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ > - | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) > + | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP \ > + | X86_CR4_CET)) > > #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 984ab2b395b3..333a9e0d7cdf 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -344,7 +344,8 @@ void kvm_set_cpu_caps(void) > F(AVX512VBMI) | F(LA57) | 0 /*PKU*/ | 0 /*OSPKE*/ | F(RDPID) | > F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) | > F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) | > - F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/ > + F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/ | > + F(SHSTK) > ); > /* Set LA57 based on hardware capability. */ > if (cpuid_ecx(7) & F(LA57)) > @@ -353,7 +354,7 @@ void kvm_set_cpu_caps(void) > kvm_cpu_cap_mask(CPUID_7_EDX, > F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | > F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | > - F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) > + F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) | F(IBT) SHSTK and IBT need to be disabled in vmx_set_cpu_caps() if unrestricted guest is disabled. CET won't play nice with emulating arbitrary instructions, e.g. KVM doesn't enforce ENDBR and doesn't keep SSP up-to-date (and no one is advocating fully emulating CET). Paolo also floated the idea of providing a reduced opcode set, e.g. only I/O, MOV, and ALU instructions, but I don't think that needs to be done in the initial CET enabling as it's more of a defense-in-depth than a functional requirement. No need to respin a new series just for this, it can wait until I've looked through this version. Original thread: https://lkml.kernel.org/r/20200515161919.29249-1-pbonzini@xxxxxxxxxx > ); > > /* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */ > -- > 2.17.2 >
