On 16/05/20 23:19, Roman Bolshakov wrote:
> n Sun, Mar 29, 2020 at 10:11:25AM +0300, Roman Bolshakov wrote:
>> If interrupts are disabled, STI is inhibiting interrupts for the
>> instruction following it. If STI is followed by HLT, the CPU is going to
>> handle all pending or new interrupts as soon as HLT is executed.
>>
>> Test if emulator properly clears inhibition state and allows the
>> scenario outlined above.
>>
>> Cc: Cameron Esfahani <dirty@xxxxxxxxx>
>> Signed-off-by: Roman Bolshakov <r.bolshakov@xxxxxxxxx>
>> ---
>> x86/realmode.c | 21 +++++++++++++++++++++
>> 1 file changed, 21 insertions(+)
>>
>> diff --git a/x86/realmode.c b/x86/realmode.c
>> index 31f84d0..3518224 100644
>> --- a/x86/realmode.c
>> +++ b/x86/realmode.c
>> @@ -814,6 +814,26 @@ static void test_int(void)
>> report("int 1", 0, 1);
>> }
>>
>> +static void test_sti_inhibit(void)
>> +{
>> + init_inregs(NULL);
>> +
>> + *(u32 *)(0x73 * 4) = 0x1000; /* Store IRQ 11 handler in the IDT */
>> + *(u8 *)(0x1000) = 0xcf; /* 0x1000 contains an IRET instruction */
>> +
>> + MK_INSN(sti_inhibit, "cli\n\t"
>> + "movw $0x200b, %dx\n\t"
>> + "movl $1, %eax\n\t"
>> + "outl %eax, %dx\n\t" /* Set IRQ11 */
>> + "movl $0, %eax\n\t"
>> + "outl %eax, %dx\n\t" /* Clear IRQ11 */
>> + "sti\n\t"
>> + "hlt\n\t");
>> + exec_in_big_real_mode(&insn_sti_inhibit);
>> +
>> + report("sti inhibit", ~0, 1);
>> +}
>> +
>> static void test_imul(void)
>> {
>> MK_INSN(imul8_1, "mov $2, %al\n\t"
>> @@ -1739,6 +1759,7 @@ void realmode_start(void)
>> test_xchg();
>> test_iret();
>> test_int();
>> + test_sti_inhibit();
>> test_imul();
>> test_mul();
>> test_div();
>> --
>> 2.24.1
>>
>
> Hi,
>
> Should I resend the patch?
> And this one: https://patchwork.kernel.org/cover/11449525/ ?
>
> Thanks,
> Roman
>
Queued both, thanks.
Paolo
