On Wed, Apr 29, 2020 at 11:36:31AM +0200, Vitaly Kuznetsov wrote: > Concerns were expressed around APF delivery via synthetic #PF exception as > in some cases such delivery may collide with real page fault. For type 2 > (page ready) notifications we can easily switch to using an interrupt > instead. Introduce new MSR_KVM_ASYNC_PF2 mechanism. > > One notable difference between the two mechanisms is that interrupt may not > get handled immediately so whenever we would like to deliver next event > (regardless of its type) we must be sure the guest had read and cleared > previous event in the slot. > > Signed-off-by: Vitaly Kuznetsov <vkuznets@xxxxxxxxxx> > --- > Documentation/virt/kvm/msr.rst | 38 +++++++++++--- > arch/x86/include/asm/kvm_host.h | 5 +- > arch/x86/include/uapi/asm/kvm_para.h | 6 +++ > arch/x86/kvm/x86.c | 77 ++++++++++++++++++++++++++-- > 4 files changed, 113 insertions(+), 13 deletions(-) > > diff --git a/Documentation/virt/kvm/msr.rst b/Documentation/virt/kvm/msr.rst > index 33892036672d..7433e55f7184 100644 > --- a/Documentation/virt/kvm/msr.rst > +++ b/Documentation/virt/kvm/msr.rst > @@ -203,14 +203,21 @@ data: > the hypervisor at the time of asynchronous page fault (APF) > injection to indicate type of asynchronous page fault. Value > of 1 means that the page referred to by the page fault is not > - present. Value 2 means that the page is now available. Disabling > - interrupt inhibits APFs. Guest must not enable interrupt > - before the reason is read, or it may be overwritten by another > - APF. Since APF uses the same exception vector as regular page > - fault guest must reset the reason to 0 before it does > - something that can generate normal page fault. If during page > - fault APF reason is 0 it means that this is regular page > - fault. > + present. Value 2 means that the page is now available. > + > + Type 1 page (page missing) events are currently always delivered as > + synthetic #PF exception. Type 2 (page ready) are either delivered > + by #PF exception (when bit 3 of MSR_KVM_ASYNC_PF_EN is clear) or > + via an APIC interrupt (when bit 3 set). APIC interrupt delivery is > + controlled by MSR_KVM_ASYNC_PF2. > + > + For #PF delivery, disabling interrupt inhibits APFs. Guest must > + not enable interrupt before the reason is read, or it may be > + overwritten by another APF. Since APF uses the same exception > + vector as regular page fault guest must reset the reason to 0 > + before it does something that can generate normal page fault. > + If during pagefault APF reason is 0 it means that this is regular > + page fault. Hi Vitaly, Again, thinking about how errors will be delivered. Will these be using same interrupt path? As you mentioned that if interrupts are disabled, APFs are blocked. That means host will fall back to synchronous fault? If yes, that means we will need a mechanism to report errors in synchronous path too. Thanks Vivek
