PDCM(Perfmon and Debug Capability) indicates the processor supports
the performance and debug feature indication IA32_PERF_CAPABILITIES.
Expose PDCM feature when PEBS virtualization via Intel PT is supported
in KVM guest.
Signed-off-by: Luwei Kang <luwei.kang@xxxxxxxxx>
---
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/kvm/pmu.h | 1 +
arch/x86/kvm/vmx/capabilities.h | 9 +++++++--
arch/x86/kvm/vmx/pmu_intel.c | 13 +++++++++++++
4 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index d3d6e48..750a2d5 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -155,6 +155,7 @@
#define PERF_CAP_ARCH_REG BIT_ULL(7)
#define PERF_CAP_PEBS_FORMAT 0xf00
#define PERF_CAP_PEBS_BASELINE BIT_ULL(14)
+#define PERF_CAP_PEBS_OUTPUT_PT BIT_ULL(16)
#define MSR_PEBS_LD_LAT_THRESHOLD 0x000003f6
#define MSR_IA32_RTIT_CTL 0x00000570
diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h
index d640628..ba8c68d 100644
--- a/arch/x86/kvm/pmu.h
+++ b/arch/x86/kvm/pmu.h
@@ -33,6 +33,7 @@ struct kvm_pmu_ops {
int (*is_valid_rdpmc_ecx)(struct kvm_vcpu *vcpu, unsigned int idx);
bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr);
bool (*is_pebs_via_ds_supported)(void);
+ bool (*is_pebs_via_pt_supported)(void);
bool (*is_pebs_baseline_supported)(void);
int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
index 9e352b5..dc480c9 100644
--- a/arch/x86/kvm/vmx/capabilities.h
+++ b/arch/x86/kvm/vmx/capabilities.h
@@ -154,10 +154,15 @@ static inline bool vmx_pku_supported(void)
static inline bool vmx_pdcm_supported(void)
{
+ bool ret = 0;
+
if (kvm_x86_ops->pmu_ops->is_pebs_via_ds_supported)
- return kvm_x86_ops->pmu_ops->is_pebs_via_ds_supported();
+ ret |= kvm_x86_ops->pmu_ops->is_pebs_via_ds_supported();
- return false;
+ if (kvm_x86_ops->pmu_ops->is_pebs_via_pt_supported)
+ ret |= kvm_x86_ops->pmu_ops->is_pebs_via_pt_supported();
+
+ return ret;
}
static inline bool vmx_dtes64_supported(void)
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 2db9b9e..f04e5eb 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -221,6 +221,18 @@ static bool intel_is_pebs_via_ds_supported(void)
return true;
}
+static bool intel_is_pebs_via_pt_supported(void)
+{
+ u64 misc, perf_cap;
+
+ rdmsrl(MSR_IA32_MISC_ENABLE, misc);
+ rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_cap);
+
+ return (!(misc & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL) &&
+ (perf_cap & PERF_CAP_PEBS_OUTPUT_PT) &&
+ (pt_mode == PT_MODE_HOST_GUEST));
+}
+
static bool intel_is_pebs_baseline_supported(void)
{
u64 perf_cap;
@@ -529,6 +541,7 @@ struct kvm_pmu_ops intel_pmu_ops = {
.is_valid_rdpmc_ecx = intel_is_valid_rdpmc_ecx,
.is_valid_msr = intel_is_valid_msr,
.is_pebs_via_ds_supported = intel_is_pebs_via_ds_supported,
+ .is_pebs_via_pt_supported = intel_is_pebs_via_pt_supported,
.is_pebs_baseline_supported = intel_is_pebs_baseline_supported,
.get_msr = intel_pmu_get_msr,
.set_msr = intel_pmu_set_msr,
--
1.8.3.1
