Hi Marc, $subject typo: ~/DBGBIDR/DBGDIDR/ On 16/02/2020 18:53, Marc Zyngier wrote: > The AArch32 CP14 DBGDIDR has bit 15 set to RES1, which our current > emulation doesn't set. Just add the missing bit. So it does. Reviewed-by: James Morse <james.morse@xxxxxxx> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 3e909b117f0c..da82c4b03aab 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -1658,7 +1658,7 @@ static bool trap_dbgidr(struct kvm_vcpu *vcpu, > p->regval = ((((dfr >> ID_AA64DFR0_WRPS_SHIFT) & 0xf) << 28) | > (((dfr >> ID_AA64DFR0_BRPS_SHIFT) & 0xf) << 24) | > (((dfr >> ID_AA64DFR0_CTX_CMPS_SHIFT) & 0xf) << 20) > - | (6 << 16) | (el3 << 14) | (el3 << 12)); > + | (6 << 16) | (1 << 15) | (el3 << 14) | (el3 << 12)); Hmmm, where el3 is: | u32 el3 = !!cpuid_feature_extract_unsigned_field(pfr, ID_AA64PFR0_EL3_SHIFT); Aren't we depending on the compilers 'true' being 1 here? Thanks, James
