[PATCH kvm-unit-tests] x86: vmx: Expect multiple error codes on HOST_EFER corruption

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Extended HOST_EFER tests can fail with a different error code than the
expected one, since the host address size bit is checked against
EFER.LMA. This causes kvm-unit-tests to fail on bare metal. According
to the SDM the errors are not ordered.

Expect either "invalid control" or "invalid host state" error-codes to
allow the tests to pass. The fix somewhat relaxes the tests, as there
are cases when only "invalid host state" is a valid instruction error,
but doing the fix in this manner prevents intrusive changes.

Fixes: a22d7b5534c2 ("x86: vmx_tests: extend HOST_EFER tests")
Signed-off-by: Nadav Amit <namit@xxxxxxxxxx>
---
 x86/vmx_tests.c | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c
index 69429e5..e69c361 100644
--- a/x86/vmx_tests.c
+++ b/x86/vmx_tests.c
@@ -3407,6 +3407,27 @@ static void test_vmx_vmlaunch(u32 xerror)
 	}
 }
 
+/*
+ * Try to launch the current VMCS, and expect one of two possible
+ * errors (or success) codes.
+ */
+static void test_vmx_vmlaunch2(u32 xerror1, u32 xerror2)
+{
+	bool success = vmlaunch_succeeds();
+	u32 vmx_inst_err;
+
+	if (!xerror1 == !xerror2)
+		report(success == !xerror1, "vmlaunch %s",
+		       !xerror1 ? "succeeds" : "fails");
+
+	if (!success && (xerror1 || xerror2)) {
+		vmx_inst_err = vmcs_read(VMX_INST_ERROR);
+		report(vmx_inst_err == xerror1 || vmx_inst_err == xerror2,
+		       "VMX inst error is %d or %d (actual %d)", xerror1,
+		       xerror2, vmx_inst_err);
+	}
+}
+
 static void test_vmx_invalid_controls(void)
 {
 	test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_CONTROL_FIELD);
@@ -6764,7 +6785,8 @@ static void test_efer_vmlaunch(u32 fld, bool ok)
 		if (ok)
 			test_vmx_vmlaunch(0);
 		else
-			test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
+			test_vmx_vmlaunch2(VMXERR_ENTRY_INVALID_CONTROL_FIELD,
+					VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
 	} else {
 		if (ok) {
 			enter_guest();
-- 
2.20.1




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