Sean Christopherson <sean.j.christopherson@xxxxxxxxx> writes:
> Snapshot the MSR index when processing the virtualized and emulated MSR
> lists in kvm_init_msr_list() to improve code readability, particularly
> in the RTIT and PerfMon MSR checks.
>
> No functional change intended.
>
> Signed-off-by: Sean Christopherson <sean.j.christopherson@xxxxxxxxx>
> ---
> arch/x86/kvm/x86.c | 22 +++++++++++++---------
> 1 file changed, 13 insertions(+), 9 deletions(-)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 24597526b5de..3d4a5326d84e 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -5214,7 +5214,7 @@ long kvm_arch_vm_ioctl(struct file *filp,
> static void kvm_init_msr_list(void)
> {
> struct x86_pmu_capability x86_pmu;
> - u32 dummy[2];
> + u32 dummy[2], msr_index;
> unsigned i;
>
> BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
> @@ -5227,14 +5227,16 @@ static void kvm_init_msr_list(void)
> num_msr_based_features = 0;
>
> for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
> - if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
> + msr_index = msrs_to_save_all[i];
> +
> + if (rdmsr_safe(msr_index, &dummy[0], &dummy[1]) < 0)
> continue;
>
> /*
> * Even MSRs that are valid in the host may not be exposed
> * to the guests in some cases.
> */
> - switch (msrs_to_save_all[i]) {
> + switch (msr_index) {
> case MSR_IA32_BNDCFGS:
> if (!kvm_mpx_supported())
> continue;
> @@ -5262,17 +5264,17 @@ static void kvm_init_msr_list(void)
> break;
> case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
> if (!kvm_x86_ops->pt_supported() ||
> - msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
> + msr_index - MSR_IA32_RTIT_ADDR0_A >=
> intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
> continue;
> break;
> case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
> - if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
> + if (msr_index - MSR_ARCH_PERFMON_PERFCTR0 >=
> min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
> continue;
> break;
> case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
> - if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
> + if (msr_index - MSR_ARCH_PERFMON_EVENTSEL0 >=
> min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
> continue;
> break;
> @@ -5280,14 +5282,16 @@ static void kvm_init_msr_list(void)
> break;
> }
>
> - msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
> + msrs_to_save[num_msrs_to_save++] = msr_index;
> }
>
> for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
> - if (!kvm_x86_ops->has_emulated_msr(emulated_msrs_all[i]))
> + msr_index = emulated_msrs_all[i];
> +
> + if (!kvm_x86_ops->has_emulated_msr(msr_index))
> continue;
>
> - emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
> + emulated_msrs[num_emulated_msrs++] = msr_index;
> }
>
> for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
Reviewed-by: Vitaly Kuznetsov <vkuznets@xxxxxxxxxx>
--
Vitaly
