On Monday, January 13, 2020 1:29:11 PM CET Peter Zijlstra wrote: > On Mon, Jan 13, 2020 at 12:18:46PM +0100, Rafael J. Wysocki wrote: > > On Monday, January 13, 2020 11:43:14 AM CET Peter Zijlstra wrote: > > > > Anyone, what will it take to get MPERF/TSC 'working' ? > > > > The same thing that intel_pstate does. > > But intel_pstate cheats, it has a FMS listing and possible 'interesting' > chips are excluded. For instance, Core2 has APERF/MPERF, but > intel_pstate does not support Core2. > > Simlarly, intel_pstate does (obviously) not support AMD chips, even tho > those have APERF/MPERF. > > Although I suppose Core2 doesn't have VMX and is therefore less > interesting, but then we'd need to gate the logic with something like: > > static_cpu_has(X86_FEATURE_APERFMPERF) && > (static_cpu_has(X86_FEATURE_VMX) || static_cpu_has(X86_FEATURE_SVM) > > > Generally speaking, it shifts the mperf values by a number of positions > > depending on the CPU model, but that is 1 except for KNL. > > > > See get_target_pstate(). > > I'm going to go out on a limb and guess that's the same KNL hack as > TurboStat has. > > Is that really the only known case? I'm not aware of any other at least as far as Intel chips go.
