On 13.01.20 13:33, Claudio Imbrenda wrote:
> On Mon, 13 Jan 2020 12:00:00 +0100
> David Hildenbrand <david@xxxxxxxxxx> wrote:
>
>>> +/**
>>> + * Test some bits in the instruction format that are specified to
>>> be ignored.
>>> + */
>>> +static void test_instbits(void)
>>> +{
>>> + SCCBHeader *h = (SCCBHeader *)pagebuf;
>>> + int cc;
>>> +
>>> + expect_pgm_int();
>>> + sclp_mark_busy();
>>> + h->length = 8;
>>> + sclp_setup_int();
>>> +
>>> + asm volatile(
>>> + " .insn rre,0xb2204200,%1,%2\n" /* servc
>>> %1,%2 */
>>> + " ipm %0\n"
>>> + " srl %0,28"
>>> + : "=&d" (cc) : "d" (valid_code), "a"
>>> (__pa(pagebuf))
>>> + : "cc", "memory");
>>> + if (lc->pgm_int_code) {
>>> + sclp_handle_ext();
>>> + cc = 1;
>>> + } else if (!cc)
>>> +
>>
>> I wonder if something like the following would be possible:
>>
>> expect_pgm_int();
>> ...
>> asm volatiole();
>> ...
>> sclp_wait_busy();
>> check_pgm_int_code(PGM_INT_CODE_SPECIFICATION);
>
> we do not expect a specification exception, if that happens it's
> a bug and the test should rightfully fail.
Which one do we expect? (you're not checking for a specific one, should
you?)
>
>> We would have to clear "sclp_busy" when we get a progam interrupt on a
>> servc instruction - shouldn't be too hard to add to the program
>> exception handler.
>
> Sure that could be done, but is it worth it to rework the program
> interrupt handler only for one unit test?
Good point. I don't like this particular code, but I can live with it :)
--
Thanks,
David / dhildenb
