On 16/10/2019 18:10, Anup Patel wrote: > From: Atish Patra <atish.patra@xxxxxxx> > > The RISC-V hypervisor specification doesn't have any virtual timer > feature. > > Due to this, the guest VCPU timer will be programmed via SBI calls. > The host will use a separate hrtimer event for each guest VCPU to > provide timer functionality. We inject a virtual timer interrupt to > the guest VCPU whenever the guest VCPU hrtimer event expires. > > The following features are not supported yet and will be added in > future: > 1. A time offset to adjust guest time from host time > 2. A saved next event in guest vcpu for vm migration > > Signed-off-by: Atish Patra <atish.patra@xxxxxxx> > Signed-off-by: Anup Patel <anup.patel@xxxxxxx> > Acked-by: Paolo Bonzini <pbonzini@xxxxxxxxxx> > Reviewed-by: Paolo Bonzini <pbonzini@xxxxxxxxxx> For the drivers/clocksource part: Acked-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> [ ... ] -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
