Hi Eric, On 11.07.2019 15:56, Eric Auger wrote: > This series brings the VFIO part of HW nested paging support > in the SMMUv3. > > The series depends on: > [PATCH v9 00/14] SMMUv3 Nested Stage Setup (IOMMU part) > (https://www.spinics.net/lists/kernel/msg3187714.html) > > 3 new IOCTLs are introduced that allow the userspace to > 1) pass the guest stage 1 configuration > 2) pass stage 1 MSI bindings > 3) invalidate stage 1 related caches > > They map onto the related new IOMMU API functions. > > We introduce the capability to register specific interrupt > indexes (see [1]). A new DMA_FAULT interrupt index allows to register > an eventfd to be signaled whenever a stage 1 related fault > is detected at physical level. Also a specific region allows > to expose the fault records to the user space. > > Best Regards > > Eric > > This series can be found at: > https://github.com/eauger/linux/tree/v5.3.0-rc0-2stage-v9 I think you have already tested on ThunderX2, but as a formality, for the whole series: Tested-by: Tomasz Nowicki <tnowicki@xxxxxxxxxxx> qemu: https://github.com/eauger/qemu/tree/v4.1.0-rc0-2stage-rfcv5 kernel: https://github.com/eauger/linux/tree/v5.3.0-rc0-2stage-v9 + Shameer's fix patch In my test I assigned Intel 82574L NIC and perform iperf tests. Other folks from Marvell claimed this to be important feature so I asked them to review and speak up on mailing list. Thanks, Tomasz
