The current guest mitigation of TAA is both too heavy and not really
sufficient. It is too heavy because it will cause some affected CPUs
(those that have MDS_NO but lack TAA_NO) to fall back to VERW and
get the corresponding slowdown. It is not really sufficient because
it will cause the MDS_NO bit to disappear upon microcode update, so
that VMs started before the microcode update will not be runnable
anymore afterwards, even with tsx=on.
Instead, if tsx=on on the host, we can emulate MSR_IA32_TSX_CTRL for
the guest and let it run without the VERW mitigation. Even though
MSR_IA32_TSX_CTRL is quite heavyweight, and we do not want to write
it on every vmentry, we can use the shared MSR functionality because
the host kernel need not protect itself from TSX-based side-channels.
Patch 1 is a minimal fix for MSR_IA32_ARCH_CAPABILITIES for stable
kernels. The other four patches implement the feature.
Getting some help testing this series with the kvm-unit-tests patch I
have just sent would be great; I could only test this on a machine that
I couldn't reboot, and therefore I could only work on an older kernel.
Paolo Bonzini (5):
KVM: x86: fix presentation of TSX feature in ARCH_CAPABILITIES
KVM: x86: do not modify masked bits of shared MSRs
KVM: x86: implement MSR_IA32_TSX_CTRL effect on CPUID
KVM: vmx: implement MSR_IA32_TSX_CTRL disable RTM functionality
KVM: vmx: use MSR_IA32_TSX_CTRL to hard-disable TSX on guest that lack
it
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/cpuid.c | 8 +++--
arch/x86/kvm/vmx/vmx.c | 78 ++++++++++++++++++++++++++++++++---------
arch/x86/kvm/x86.c | 34 ++++++++----------
4 files changed, 82 insertions(+), 39 deletions(-)
--
1.8.3.1
