> On Nov 13, 2019, at 1:24 PM, Dave Hansen <dave.hansen@xxxxxxxxx> wrote: > > On 11/13/19 12:23 AM, Paolo Bonzini wrote: >> On 13/11/19 07:38, Jan Kiszka wrote: >>> When reading MCE, error code 0150h, ie. SRAR, I was wondering if that >>> couldn't simply be handled by the host. But I suppose the symptom of >>> that erratum is not "just" regular recoverable MCE, rather >>> sometimes/always an unrecoverable CPU state, despite the error code, right? >> The erratum documentation talks explicitly about hanging the system, but >> it's not clear if it's just a result of the OS mishandling the MCE, or >> something worse. So I don't know. :( Pawan, do you? > > It's "something worse". > > I built a kernel module reproducer for this a long time ago. The > symptom I observed was the whole system hanging hard, requiring me to go > hit the power button. The MCE software machinery was not involved at > all from what I could tell. > > About creating a unit test, I'd be personally happy to share my > reproducer, but I built it before this issue was root-caused. There are > actually quite a few underlying variants and a good unit test would make > sure to exercise all of them. My reproducer probably only exercised a > single case. So please correct me if I am wrong. My understanding is that the reason that only KVM needs to be fixed is that there is a strong assumption that the kernel does not hold both 4k and 2M mappings at the same time. There is indeed documentation that this is the intention in __split_huge_pmd_locked(), for instance, due to other AMD issues with such setup. But is it always the case? Looking at __split_large_page(), it seems that the TLB invalidation is only done after the PMD is changed. Can't this leave a small time window in which a malicious actor triggers a machine-check on another core than the one that runs __split_large_page()?
