On 16/05/19 10:25, Luwei Kang wrote: > This patch set is mainly used for reduce the overhead of switch > Intel PT configuation contex on VM-Entry/Exit by XSAVES/XRSTORS > instructions. > > I measured the cycles number of context witch on Manual and > XSAVES/XRSTORES by rdtsc, and the data as below: > > Manual save(rdmsr): ~334 cycles > Manual restore(wrmsr): ~1668 cycles > > XSAVES insturction: ~124 cycles > XRSTORS instruction: ~378 cycles > > Manual: Switch the configuration by rdmsr and wrmsr instruction, > and there have 8 registers need to be saved or restore. > They are IA32_RTIT_OUTPUT_BASE, *_OUTPUT_MASK_PTRS, > *_STATUS, *_CR3_MATCH, *_ADDR0_A, *_ADDR0_B, > *_ADDR1_A, *_ADDR1_B. > XSAVES/XRSTORS: Switch the configuration context by XSAVES/XRSTORS > instructions. This patch set will allocate separate > "struct fpu" structure to save host and guest PT state. > Only a small portion of this structure will be used because > we only save/restore PT state (not save AVX, AVX-512, MPX, > PKRU and so on). > > This patch set also do some code clean e.g. patch 2 will reuse > the fpu pt_state to save the PT configuration contex and > patch 3 will dymamic allocate Intel PT configuration state. > > Luwei Kang (6): > x86/fpu: Introduce new fpu state for Intel processor trace > KVM: VMX: Reuse the pt_state structure for PT context > KVM: VMX: Dymamic allocate Intel PT configuration state > KVM: VMX: Allocate XSAVE area for Intel PT configuration > KVM: VMX: Intel PT configration context switch using XSAVES/XRSTORS > KVM: VMX: Get PT state from xsave area to variables > > arch/x86/include/asm/fpu/types.h | 13 ++ > arch/x86/kvm/vmx/nested.c | 2 +- > arch/x86/kvm/vmx/vmx.c | 338 ++++++++++++++++++++++++++------------- > arch/x86/kvm/vmx/vmx.h | 21 +-- > 4 files changed, 243 insertions(+), 131 deletions(-) > Luwei, I found I had missed this series. Can you check whether it needs a rebase, since I don't have hardware that supports it? Paolo
