Fix the order the registers show up in SAVE_GPR and SAVE_GPR_C to ensure
the correct registers get the correct values. Previously, the registers
were being written to (and read from) the wrong fields.
Reviewed-by: Jim Mattson <jmattson@xxxxxxxxxx>
Signed-off-by: Aaron Lewis <aaronlewis@xxxxxxxxxx>
---
x86/vmx.h | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/x86/vmx.h b/x86/vmx.h
index 8496be7..8527997 100644
--- a/x86/vmx.h
+++ b/x86/vmx.h
@@ -492,9 +492,9 @@ enum vm_instruction_error_number {
#define SAVE_GPR \
"xchg %rax, regs\n\t" \
- "xchg %rbx, regs+0x8\n\t" \
- "xchg %rcx, regs+0x10\n\t" \
- "xchg %rdx, regs+0x18\n\t" \
+ "xchg %rcx, regs+0x8\n\t" \
+ "xchg %rdx, regs+0x10\n\t" \
+ "xchg %rbx, regs+0x18\n\t" \
"xchg %rbp, regs+0x28\n\t" \
"xchg %rsi, regs+0x30\n\t" \
"xchg %rdi, regs+0x38\n\t" \
@@ -511,9 +511,9 @@ enum vm_instruction_error_number {
#define SAVE_GPR_C \
"xchg %%rax, regs\n\t" \
- "xchg %%rbx, regs+0x8\n\t" \
- "xchg %%rcx, regs+0x10\n\t" \
- "xchg %%rdx, regs+0x18\n\t" \
+ "xchg %%rcx, regs+0x8\n\t" \
+ "xchg %%rdx, regs+0x10\n\t" \
+ "xchg %%rbx, regs+0x18\n\t" \
"xchg %%rbp, regs+0x28\n\t" \
"xchg %%rsi, regs+0x30\n\t" \
"xchg %%rdi, regs+0x38\n\t" \
--
2.24.0.rc0.303.g954a862665-goog
