On Wed, Oct 9, 2019 at 6:28 PM Yang Weijiang <weijiang.yang@xxxxxxxxx> wrote: > > On Wed, Oct 09, 2019 at 04:08:50PM -0700, Jim Mattson wrote: > > On Tue, Oct 8, 2019 at 11:41 PM Yang Weijiang <weijiang.yang@xxxxxxxxx> wrote: > > > > > > On Wed, Oct 02, 2019 at 11:54:26AM -0700, Jim Mattson wrote: > > > > On Thu, Sep 26, 2019 at 7:17 PM Yang Weijiang <weijiang.yang@xxxxxxxxx> wrote: > > > > > + if (cet_on) > > > > > + vmcs_set_bits(VM_ENTRY_CONTROLS, > > > > > + VM_ENTRY_LOAD_GUEST_CET_STATE); > > > > > > > > Have we ensured that this VM-entry control is supported on the platform? > > > > > > > If all the checks pass, is it enought to ensure the control bit supported? > > > > I don't think so. The only way to check to see if a VM-entry control > > is supported is to check the relevant VMX capability MSR. > > > It's a bit odd, there's no relevant CET bit in VMX cap. MSR, so I have > to check like this. Bit 52 of the IA32_VMX_ENTRY_CTLS MSR (index 484H) [and bit 52 of the IA32_VMX_TRUE_ENTRY_CTLS MSR (index 490H), on hardware that supports the "true" VMX capability MSRs] will be 1 if it is legal to set bit 20 of the VM-entry controls field to 1. > > BTW, what about the corresponding VM-exit control? > The kernel supervisor mode CET is not implemented yet, so I don't load host CET > states on VM-exit, in future, I'll add it. If you don't clear the supervisor mode CET state on VM-exit and the guest has set IA32_S_CET.SH_STK_EN, doesn't that mean that supervisor-mode shadow stacks will then be enabled on the host after VM-exit?
