On Fri, 6 Sep 2019 at 09:33, Xiang Zheng <zhengxiang9@xxxxxxxxxx> wrote: > > In the ARMv8 platform, the CPU error types are synchronous external abort(SEA) > and SError Interrupt (SEI). If exception happens in guest, sometimes it's better > for guest to perform the recovery, because host does not know the detailed > information of guest. For example, if an exception happens in a user-space > application within guest, host does not know which application encounters > errors. > > For the ARMv8 SEA/SEI, KVM or host kernel delivers SIGBUS to notify userspace. > After user space gets the notification, it will record the CPER into guest GHES > buffer and inject an exception or IRQ into guest. > > In the current implementation, if the type of SIGBUS is BUS_MCEERR_AR, we will > treat it as a synchronous exception, and notify guest with ARMv8 SEA > notification type after recording CPER into guest. > > This series of patches are based on Qemu 4.1, which include two parts: > 1. Generate APEI/GHES table. > 2. Handle the SIGBUS signal, record the CPER in runtime and fill it into guest > memory, then notify guest according to the type of SIGBUS. > > The whole solution was suggested by James(james.morse@xxxxxxx); The solution of > APEI section was suggested by Laszlo(lersek@xxxxxxxxxx). > Show some discussions in [1]. > > This series of patches have already been tested on ARM64 platform with RAS > feature enabled: > Show the APEI part verification result in [2]. > Show the BUS_MCEERR_AR SIGBUS handling verification result in [3]. > > --- > > Since Dongjiu is too busy to do this work, I will finish the rest work on behalf > of him. Thanks for picking up the work on this patchset, and sorry it's taken me a while to get to reviewing it. I've now given review comments on the arm parts of this, which are looking in generally good shape (my comments are all pretty minor stuff I think). I'll have to leave the ACPI parts to somebody else to review as that is definitely not my speciality. thanks -- PMM
