On Wed, Aug 28, 2019 at 04:41:31PM -0700, Oliver Upton wrote: > According to the SDM 26.3.1.1, "If the "load IA32_PERF_GLOBAL_CTRL" VM-entry > control is 1, bits reserved in the IA32_PERF_GLOBAL_CTRL MSR must be 0 in the > field for that register". > > Adding condition to nested_vmx_check_guest_state() to check the validity of > GUEST_IA32_PERF_GLOBAL_CTRL if the "load IA32_PERF_GLOBAL_CTRL" bit is > set on the VM-entry control. Same comment on mood. And for this case, it's probably overkill to give a play-by-play of the code, just state that you're adding a check as described in the SDM, e.g.: Add a nested VM-Enter consistency check when loading the guest's IA32_PERF_GLOBAL_CTRL MSR from vmcs12. Per Intel's SDM: If the "load IA32_PERF_GLOBAL_CTRL" VM-entry control is 1, bits reserved in the IA32_PERF_GLOBAL_CTRL MSR must be 0 in the field for that register. > > Suggested-by: Jim Mattson <jmattson@xxxxxxxxxx> > Signed-off-by: Oliver Upton <oupton@xxxxxxxxxx> > --- > arch/x86/kvm/vmx/nested.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c > index 9ba90b38d74b..8d6f0144b1bd 100644 > --- a/arch/x86/kvm/vmx/nested.c > +++ b/arch/x86/kvm/vmx/nested.c > @@ -10,6 +10,7 @@ > #include "hyperv.h" > #include "mmu.h" > #include "nested.h" > +#include "pmu.h" > #include "trace.h" > #include "x86.h" > > @@ -2748,6 +2749,11 @@ static int nested_vmx_check_guest_state(struct kvm_vcpu *vcpu, > return -EINVAL; > } > > + if (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL && > + !kvm_is_valid_perf_global_ctrl(vcpu, > + vmcs12->guest_ia32_perf_global_ctrl)) > + return -EINVAL; > + > /* > * If the load IA32_EFER VM-entry control is 1, the following checks > * are performed on the field for the IA32_EFER MSR: > -- > 2.23.0.187.g17f5b7556c-goog >