On Thu, Aug 29, 2019 at 2:30 PM Krish Sadhukhan <krish.sadhukhan@xxxxxxxxxx> wrote: > > According to section "Checks on Guest Control Registers, Debug Registers, and > and MSRs" in Intel SDM vol 3C, the following checks are performed on vmentry > of nested guests: > > If the "load debug controls" VM-entry control is 1, > > - bits reserved in the IA32_DEBUGCTL MSR must be 0 in the field for > that register. The first processors to support the virtual-machine > extensions supported only the 1-setting of this control and thus > performed this check unconditionally. > > - bits 63:32 in the DR7 field must be 0. > > Signed-off-by: Krish Sadhukhan <krish.sadhukhan@xxxxxxxxxx> > Reviewed-by: Karl Heubaum <karl.heubaum@xxxxxxxxxx> > --- > ... > +#define DEBUGCTL_RESERVED_BITS 0xFFFFFFFFFFFF203C For the virtual CPU implemented by kvm today, only bits 0 and 1 are allowed.
