On 16/07/19 21:34, Liran Alon wrote: >> When this errata is hit, the CPU will be at CPL3. From hardware >> point-of-view the below sequence happens: >> >> 1. CPL3 guest hits reserved bit NPT fault (MMIO access) > Why CPU needs to be at CPL3? > The requirement for SMAP should be that this page is user-accessible in guest page-tables. > Think on a case where guest have CR4.SMAP=1 and CR4.SMEP=0. > If you are not at CPL3, you'd get a SMAP NPF, not a RSVD NPF. Paolo
