Re: [kvm-unit-tests PATCH] tscdeadline_latency: Check condition first before loop

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Thu, Jul 11, 2019 at 07:05:53AM -0700, Sean Christopherson wrote:
> Ensuring the first hlt lands in an interrupt shadow should prevent getting
> into a halted state after the timer has been disabled, e.g.:
> 
>     irq_disable();
>     test_tsc_deadline_timer();
> 
>     do {
>         safe_halt();
>     } while (!hitmax && table_idx < size);

Yes seems better, thanks for the suggestion (though I'll probably also
need to remove the hidden sti in start_tsc_deadline_timer).

Is safe_halt() really safe?  I mean, IRQ handler could still run
before HLT right after STI right?  Though no matter what I think it's
fine for this test case because we'll skip the first IRQ after all.
Just curious.

Thanks,

-- 
Peter Xu



[Index of Archives]     [KVM ARM]     [KVM ia64]     [KVM ppc]     [Virtualization Tools]     [Spice Development]     [Libvirt]     [Libvirt Users]     [Linux USB Devel]     [Linux Audio Users]     [Yosemite Questions]     [Linux Kernel]     [Linux SCSI]     [XFree86]

  Powered by Linux