CMCI is enabled if IA32_MCG_CAP[10] is set. VMX tests do not respect this condition. Fix it. Cc: Marc Orr <marcorr@xxxxxxxxxx> Signed-off-by: Nadav Amit <nadav.amit@xxxxxxxxx> --- x86/vmx_tests.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index 3731757..1776e46 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -5855,6 +5855,11 @@ static u64 virt_x2apic_mode_nibble1(u64 val) return val & 0xf0; } +static bool is_cmci_enabled(void) +{ + return rdmsr(MSR_IA32_MCG_CAP) & BIT_ULL(10); +} + static void virt_x2apic_mode_rd_expectation( u32 reg, bool virt_x2apic_mode_on, bool disable_x2apic, bool apic_register_virtualization, bool virtual_interrupt_delivery, @@ -5862,8 +5867,10 @@ static void virt_x2apic_mode_rd_expectation( { bool readable = !x2apic_reg_reserved(reg) && - reg != APIC_EOI && - reg != APIC_CMCI; + reg != APIC_EOI; + + if (reg == APIC_CMCI && !is_cmci_enabled()) + readable = false; expectation->rd_exit_reason = VMX_VMCALL; expectation->virt_fn = virt_x2apic_mode_identity; @@ -5893,9 +5900,6 @@ static void virt_x2apic_mode_rd_expectation( * For writable registers, get_x2apic_wr_val() deposits the write value into the * val pointer arg and returns true. For non-writable registers, val is not * modified and get_x2apic_wr_val() returns false. - * - * CMCI, including the LVT CMCI register, is disabled by default. Thus, - * get_x2apic_wr_val() treats this register as non-writable. */ static bool get_x2apic_wr_val(u32 reg, u64 *val) { @@ -5930,6 +5934,11 @@ static bool get_x2apic_wr_val(u32 reg, u64 *val) */ *val = apic_read(reg); break; + case APIC_CMCI: + if (!is_cmci_enabled()) + return false; + *val = apic_read(reg); + break; case APIC_ICR: *val = 0x40000 | 0xf1; break; -- 2.17.1