UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions. UMONITOR arms address monitoring hardware using an address. A store to an address within the specified address range triggers the monitoring hardware to wake up the processor waiting in umwait. UMWAIT instructs the processor to enter an implementation-dependent optimized state while monitoring a range of addresses. The optimized state may be either a light-weight power/performance optimized state (c0.1 state) or an improved power/performance optimized state (c0.2 state). TPAUSE instructs the processor to enter an implementation-dependent optimized state c0.1 or c0.2 state and wake up when time-stamp counter reaches specified timeout. Availability of the user wait instructions is indicated by the presence of the CPUID feature flag WAITPKG CPUID.0x07.0x0:ECX[5]. The patches enable the umonitor, umwait and tpause features in KVM. Because umwait and tpause can put a (psysical) CPU into a power saving state, by default we dont't expose it to kvm and enable it only when guest CPUID has it. If the instruction causes a delay, the amount of time delayed is called here the physical delay. The physical delay is first computed by determining the virtual delay (the time to delay relative to the VM’s timestamp counter). The release document ref below link: Intel 64 and IA-32 Architectures Software Developer's Manual, https://software.intel.com/sites/default/files/\ managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf This patch has a dependency on https://lkml.org/lkml/2019/6/19/972 Changelog: v5: remove vmx_waitpkg_supported() to fix guest can rdmsr or wrmsr when the feature is off (Xiaoyao) rebase the patch because the kernel dependcy patch updated to v5: https://lkml.org/lkml/2019/6/19/972 v4: Set msr of IA32_UMWAIT_CONTROL can be 0 and add the check of reserved bit 1 (Radim and Xiaoyao) Use umwait_control_cached directly and add the IA32_UMWAIT_CONTROL in msrs_to_save[] to support migration (Xiaoyao) v3: Simplify the patches, expose user wait instructions when the guest has CPUID (Paolo) Use mwait_control_cached to avoid frequently rdmsr of IA32_UMWAIT_CONTROL (Paolo and Xiaoyao) Handle vm-exit for UMWAIT and TPAUSE as "never happen" (Paolo) v2: Separated from the series https://lkml.org/lkml/2018/7/10/160 Add provide a capability to enable UMONITOR, UMWAIT and TPAUSE v1: Sent out with MOVDIRI/MOVDIR64B instructions patches Tao Xu (3): KVM: x86: add support for user wait instructions KVM: vmx: Emulate MSR IA32_UMWAIT_CONTROL KVM: vmx: handle vm-exit for UMWAIT and TPAUSE arch/x86/include/asm/vmx.h | 1 + arch/x86/include/uapi/asm/vmx.h | 6 ++++- arch/x86/kernel/cpu/umwait.c | 3 ++- arch/x86/kvm/cpuid.c | 2 +- arch/x86/kvm/vmx/vmx.c | 44 +++++++++++++++++++++++++++++++++ arch/x86/kvm/vmx/vmx.h | 3 +++ arch/x86/kvm/x86.c | 1 + 7 files changed, 57 insertions(+), 3 deletions(-) -- 2.20.1
