On 13/06/19 19:22, Sean Christopherson wrote:
> SVM's Nested Page Tables (NPT) reuses x86 paging for the host-controlled
> page walk. For 32-bit KVM, this means PAE paging is used even when TDP
> is enabled, i.e. the PAE root array needs to be allocated.
>
> Fixes: ee6268ba3a68 ("KVM: x86: Skip pae_root shadow allocation if tdp enabled")
> Cc: stable@xxxxxxxxxxxxxxx
> Reported-by: Jiri Palecek <jpalecek@xxxxxx>
> Signed-off-by: Sean Christopherson <sean.j.christopherson@xxxxxxxxx>
> ---
>
> Jiri, can you please test this patch? I haven't actually verified this
> fixes the bug due to lack of SVM hardware.
>
> arch/x86/kvm/mmu.c | 16 ++++++++++------
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
> index 1e9ba81accba..d3c3d5e5ffd4 100644
> --- a/arch/x86/kvm/mmu.c
> +++ b/arch/x86/kvm/mmu.c
> @@ -5602,14 +5602,18 @@ static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
> struct page *page;
> int i;
>
> - if (tdp_enabled)
> - return 0;
> -
> /*
> - * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
> - * Therefore we need to allocate shadow page tables in the first
> - * 4GB of memory, which happens to fit the DMA32 zone.
> + * When using PAE paging, the four PDPTEs are treated as 'root' pages,
> + * while the PDP table is a per-vCPU construct that's allocated at MMU
> + * creation. When emulating 32-bit mode, cr3 is only 32 bits even on
> + * x86_64. Therefore we need to allocate the PDP table in the first
> + * 4GB of memory, which happens to fit the DMA32 zone. Except for
> + * SVM's 32-bit NPT support, TDP paging doesn't use PAE paging and can
> + * skip allocating the PDP table.
> */
> + if (tdp_enabled && kvm_x86_ops->get_tdp_level(vcpu) > PT32E_ROOT_LEVEL)
> + return 0;
> +
> page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32);
> if (!page)
> return -ENOMEM;
>
Queued, thanks.
Paolo
