This is the outcome of the review of Sean's VMX optimization series,
with some coding style improvements (at least according to me :)
and conflicts resolved between the various series that he sent.
The result on nested vmexit.flat is about a 12% improvement on
vmexit speed:
before after
cpuid 14886 13142
vmcall 14918 13189
inl_from_pmtimer 47277 45536
inl_from_qemu 46747 44826
inl_from_kernel 15218 13518
outl_to_kernel 15184 13436
self_ipi_sti_nop 16458 14858
self_ipi_sti_hlt 31876 28348
self_ipi_tpr 16603 15003
self_ipi_tpr_sti_nop 16509 15048
self_ipi_tpr_sti_hlt 32027 28386
x2apic_self_ipi_sti_hlt 16386 14788
x2apic_self_ipi_tpr_sti_hlt 16479 14881
Patches 1-6 were posted as "KVM: VMX: INTR, NMI and #MC cleanup".
Patches 7-13 were posted as "KVM: nVMX: Optimize VMCS data copying".
Patches 15-30 were posted as "KVM: nVMX: Optimize nested VM-Entry".
Patches 31-43 were posted as "KVM: VMX: Reduce VMWRITEs to VMCS controls".
Paolo Bonzini (5):
kvm: nVMX: small cleanup in handle_exception
KVM: nVMX: Rename prepare_vmcs02_*_full to prepare_vmcs02_*_rare
KVM: VMX: simplify vmx_prepare_switch_to_{guest,host}
KVM: x86: introduce is_pae_paging
KVM: nVMX: shadow pin based execution controls
Sean Christopherson (38):
KVM: VMX: Fix handling of #MC that occurs during VM-Entry
KVM: VMX: Read cached VM-Exit reason to detect external interrupt
KVM: VMX: Store the host kernel's IDT base in a global variable
KVM: x86: Move kvm_{before,after}_interrupt() calls to vendor code
KVM: VMX: Handle NMIs, #MCs and async #PFs in common irqs-disabled fn
KVM: nVMX: Intercept VMWRITEs to read-only shadow VMCS fields
KVM: nVMX: Intercept VMWRITEs to GUEST_{CS,SS}_AR_BYTES
KVM: nVMX: Track vmcs12 offsets for shadowed VMCS fields
KVM: nVMX: Lift sync_vmcs12() out of prepare_vmcs12()
KVM: nVMX: Use descriptive names for VMCS sync functions and flags
KVM: nVMX: Add helpers to identify shadowed VMCS fields
KVM: nVMX: Sync rarely accessed guest fields only when needed
KVM: VMX: Always signal #GP on WRMSR to MSR_IA32_CR_PAT with bad value
KVM: nVMX: Always sync GUEST_BNDCFGS when it comes from vmcs01
KVM: nVMX: Write ENCLS-exiting bitmap once per vmcs02
KVM: nVMX: Don't rewrite GUEST_PML_INDEX during nested VM-Entry
KVM: nVMX: Don't "put" vCPU or host state when switching VMCS
KVM: nVMX: Don't reread VMCS-agnostic state when switching VMCS
KVM: nVMX: Don't dump VMCS if virtual APIC page can't be mapped
KVM: nVMX: Don't speculatively write virtual-APIC page address
KVM: nVMX: Don't speculatively write APIC-access page address
KVM: nVMX: Update vmcs12 for MSR_IA32_CR_PAT when it's written
KVM: nVMX: Update vmcs12 for SYSENTER MSRs when they're written
KVM: nVMX: Update vmcs12 for MSR_IA32_DEBUGCTLMSR when it's written
KVM: nVMX: Don't update GUEST_BNDCFGS if it's clean in HV eVMCS
KVM: nVMX: Copy PDPTRs to/from vmcs12 only when necessary
KVM: nVMX: Use adjusted pin controls for vmcs02
KVM: VMX: Add builder macros for shadowing controls
KVM: VMX: Shadow VMCS pin controls
KVM: VMX: Shadow VMCS primary execution controls
KVM: VMX: Shadow VMCS secondary execution controls
KVM: nVMX: Shadow VMCS controls on a per-VMCS basis
KVM: nVMX: Don't reset VMCS controls shadow on VMCS switch
KVM: VMX: Explicitly initialize controls shadow at VMCS allocation
KVM: nVMX: Preserve last USE_MSR_BITMAPS when preparing vmcs02
KVM: nVMX: Preset *DT exiting in vmcs02 when emulating UMIP
KVM: VMX: Drop hv_timer_armed from 'struct loaded_vmcs'
KVM: VMX: Leave preemption timer running when it's disabled
arch/x86/include/asm/kvm_host.h | 2 +-
arch/x86/kvm/svm.c | 6 +-
arch/x86/kvm/vmx/nested.c | 591 +++++++++++++++++++++-------------
arch/x86/kvm/vmx/nested.h | 2 +-
arch/x86/kvm/vmx/vmcs.h | 17 +-
arch/x86/kvm/vmx/vmcs12.h | 57 ++--
arch/x86/kvm/vmx/vmcs_shadow_fields.h | 79 ++---
arch/x86/kvm/vmx/vmx.c | 408 ++++++++++++-----------
arch/x86/kvm/vmx/vmx.h | 122 +++----
arch/x86/kvm/x86.c | 12 +-
arch/x86/kvm/x86.h | 5 +
11 files changed, 733 insertions(+), 568 deletions(-)
--
1.8.3.1
