On Thu, 13 Jun 2019 at 00:01, Sean Christopherson
<sean.j.christopherson@xxxxxxxxx> wrote:
>
> On Tue, Jun 11, 2019 at 03:34:07PM +0800, Wanpeng Li wrote:
> > From: Wanpeng Li <wanpengli@xxxxxxxxxxx>
> >
> > Dynamic allocate core residency msr state. MSR_CORE_C1_RES is unreadable
> > except for ATOM platform, so it is ignore here.
> >
> > Cc: Paolo Bonzini <pbonzini@xxxxxxxxxx>
> > Cc: Radim Krčmář <rkrcmar@xxxxxxxxxx>
> > Signed-off-by: Wanpeng Li <wanpengli@xxxxxxxxxxx>
> > ---
> > arch/x86/include/asm/kvm_host.h | 11 +++++++++++
> > arch/x86/kvm/vmx/vmx.c | 5 +++++
> > 2 files changed, 16 insertions(+)
> >
> > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> > index 15e973d..bd615ee 100644
> > --- a/arch/x86/include/asm/kvm_host.h
> > +++ b/arch/x86/include/asm/kvm_host.h
> > @@ -538,6 +538,15 @@ struct kvm_vcpu_hv {
> > cpumask_t tlb_flush;
> > };
> >
> > +#define NR_CORE_RESIDENCY_MSRS 3
> > +
> > +struct kvm_residency_msr {
> > + s64 value;
> > + u32 index;
> > + bool delta_from_host;
> > + bool count_with_host;
> > +};
> > +
> > struct kvm_vcpu_arch {
> > /*
> > * rip and regs accesses must go through
> > @@ -785,6 +794,8 @@ struct kvm_vcpu_arch {
> >
> > /* AMD MSRC001_0015 Hardware Configuration */
> > u64 msr_hwcr;
> > +
> > + struct kvm_residency_msr *core_cstate_msrs;
>
> Why are these in kvm_vcpu_arch? AFAICT they're only wired up for VMX.
They can be used by SVM later though I'm too busy to do that.
Regards,
Wanpeng Li
