Hello, we want to implement a page tracing mechanism in KVM based on AMD SVM using the second layer address translation. As specified in AMD's system programmer's manual the hardware should provide the faulting GPA in the EXITINFO2 field in VMCB when a PF/NPF occurs. However, we have the problem that the last 12 bits of the GPA are all 0 if the access was an instruction fetch. We now wanted to ask if someone knows if this is a 'feature' implemented by AMD (and we simply do not find it in the documentation) or if this behavior was added by KVM?
